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Nuvoton ML51TC0AE 8051 series microcontroller

Target applications: wearable devices, smart remote controls, Internet endpoint devices, smart homes, smoke detection devices, battery devices, etc.

  • Brand:

    Ingenic
  • Product Details

General Description:

The NuMicro® ML51 series is Flash embedded 1T 8051-based microcontroller. The instruction set of the ML51 is fully compatible with the standard 80C51 with performance enhanced.


The ML51 series runs up to 24 MHz at a wide voltage range from 1.8V to 5.5V, and contains up to 64/32/16 Kbytes Flash called APROM for programming code. The ML51 Flash supports InApplication-Programming (IAP) function, which enables on-chip firmware updates. Partial Flash can be optionally configured as Data Flash programmed by IAP and read by IAP or MOVC instruction. The ML51 includes an additional configurable up to 4/3/2/1 Kbytes Flash area called LDROM, in which the Boot Code normally resides for carrying out the In-System-Programming (ISP). 


The ML51 provides rich peripherals including 256 bytes of SRAM, 4/2/1 Kbytes of auxiliary RAM

(XRAM), up to 43 general purpose I/O, two 16-bit Timers/Counters 0/1, one 16-bit Timer2 with threechannel input capture module, one Watchdog Timer (WDT), one Self Wake-up Timer (WKT), one 16-bit auto-reload Timer3 for general purpose or baud rate generator, two UARTs with frame error detection and automatic address recognition, two ISO7816 Smartcard interface, two SPI, two I 2C, 12 enhanced PWM output channels with dead zone control, two analog comparators, eight-channel shared pin interrupt for all I/O ports, and one 12-bit ADC at 500 ksps. There are a total of 30 sources with 4-level-priority interrupts capability.


The ML51 is equipped with four clock sources and supports on-the-fly clock switching via software control. The four clock sources include two sets of external crystal inputs (HXT, LXT), 38.4 kHz internal oscillator, and one 24 MHz internal high-precision ±2% oscillator. The ML51 provides additional power monitoring detection such as power-on reset and 7-level brown-out detection, which stabilizes the power-on/off sequence for a high reliability system design.


The ML51 series provides 3 power modes to reduce power consumption -Low power run mode, Low power Idle mode, and Power-down mode. In Low power run mode, the power consumption can be down to 10 uA at 38.4 kHz LIRC. In Low power idle mode, CPU processing is suspended by holding the Program Counter. No program code is fetched and run in low power idle mode if the power consumption does not exceed 6 uA. Power-down mode stops the whole system clock for minimum power consumption with the leakage current less than 1 uA. The system clock of the ML51 can also be slowed down by software clock divider, which allows for flexibility between execution performance and power consumption.


Through the high performance of 1T 8051 core, low power performance of the ML51 and rich welldesigned peripherals, the ML51 benefits for low-power, battery powered devices, general purpose,home appliances, or motor control system.


Product Features:

 Operating Characteristics

– Wide supply voltage from 1.8 V to 5.5 V.

– Wide operating frequency up to 24 MHz

– Industrial temperature grade: -40 ℃ to +105 ℃.

 CPU

– Fully static design 8-bit high performance 1T 8051-based CMOS microcontroller.

– Instruction set fully compatible with MCS-51.

– 4-priority-level interrupts capability.

– Dual Data Pointers (DPTRs).

 Low power features

– Normal run typical power consumption 80A /MHz + 400 A (HIRC) or 600A (HXT)

– Low power run mode typical power consumption 15 A

– Low power Idle mode power consumption does not exceed 13 A

– Power-down mode typical power consumption less than 1 A

– Wake up time from Power-down mode less than 10 s (run with HIRC).

 Memory

– Up to 64/32/16 Kbytes of APROM for User Code.

– 4/3/2/1 Kbytes of Flash for loader (LDROM) configure from APROM for In-System-Programmable (ISP)

– Flash Memory accumulated with pages of 128 Bytes from APROM by In-Application-Programmable (IAP).

– Flash Memory 100,000 writing cycle endurance.

– Code lock for security.

– 256 Bytes on-chip RAM.

– Additional 4/2/1 Kbytes on-chip auxiliary RAM (XRAM) accessed by MOVX instruction.

 PDMA

– Three modes: peripheral-to-memory, memory-to-peripheral, and memory-to-memory transfer.

– Source address and destination address must be word alignment in all modes.

– Memory-to-memory mode: transfer length must be word alignment.

– Peripheral-to-memory and memory-to-peripheral mode: transfer length could be byte alignment.

– Peripheral-to-memory and memory-to-peripheral mode: transfer data width byte alignment.

 Clock sources

– 24 MHz high-speed internal oscillator (HIRC) trimmed to ±1% (accuracy at 25 ℃, 5 V), ±2% in all conditions.

– 38.4 kHz low-speed internal oscillator (LIRC) calibrating to ±1% by software from high-speed internal oscillator (HIRC) or external crystal (HXT).

– External 4~24 MHz crystal (HXT) input for precise timing operation.

– External 32.768 kHz (LXT) crystal input.

– On-the-fly clock source switch via software.

– Programmable system clock divider from 1/2, 1/4, 1/6, 1/8…, up to 1/512.

 Peripherals

– Up to 43 general purpose I/O pins. All output pins have individual 2-level slew rate control.

– 8 channels of GPIO interrupt with variable edge/level detection from all 43 GPIO configure as one of the input source.

– Two 16-bit Timers/Counters 0 and 1 compatible with standard 8051.

– One 16-bit Timer 2 with three-channel input capture module.

– One 16-bit auto-reload Timer 3, which can be the baud rate clock source of UARTs.

– One programmable Watchdog Timer (WDT) clocked by dedicated 38.4 kHz LIRC.

– One dedicated Self Wake-up Timer (WKT) for self-timed wake-up for power reduced modes by dedicated 38.4 kHz LIRC or 32.768 kHz LXT.

– Two full-duplex UART ports with frame error detection and automatic address recognition.

– Two smart card port supports ISO7816-3 compliant T=0, T=1 and supports full-duplex UART mode .

– Two SPI port with master and slave modes, up to 6 Mbps when system clock is 24 MHz

– Two I2C bus with master and slave modes, up to 400 kbps data rate.

– 6 pairs, 12 channels of pulse width modulator (PWM) output, up to 16-bit resolution, with different modes and Fault Brake function for motor control. The 16-bit PWM counter individual used as timer with interrupt.


ML51 SERIES PRODUCT BRIEF

– Two comparators support hysteresis function.

– One 12-bit ADC, up to 500 ksps (When VDD > 2.5 V), hardware triggered and conversion result compare facilitating motor control.

 Power monitor

– Brown-out detection (BOD) with low power mode available, 7-level selection, interrupt or reset options.

– Power-on reset (POR).

– Low voltage reset (LVR).

 Strong ESD and EFT immunity

– ESD HBM pass 8 kV

– EFT ± 4.4 kV

– Latch-up pass 150 mA

 Development Tools

– Nuvoton Nu-Link with KEILTM and IAR development environment.

– Nuvoton In-Circuit-Programmer (Nu-Link).

– Nuvoton In-System-Programming (ISP) via UART.

 96-bit Unique ID (UID)

 128-bit Unique Customer ID (UCID)


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