MXIC MX25U1633FZUI 16M-BIT FLASH MEMORY

GENERAL  DESCRIPTION

The MX25U1635E are 16,777,216 bit serial Flash memory, which is configured as 2,097,152 x 8 internally. When it is in two or four I/O read mode, the structure becomes 8,388,608 bits x 2 or 4,194,304 bits x 4. MX25U1635E feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin and WP# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

The MX25U1635E MXSMIO® (Serial Multi I/O) provides sequential read operation on whole chip.

After  program/erase  command  is  issued,  auto  program/  erase  algorithms  which  program/  erase  and  verify  the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis, or word basis for  erase command is executed on sector (4K-byte), block (32K-byte), or block (64K-byte), or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please see security features section for more details.

When the device is not in operation and CS# is high, it is put in standby mode and typically draws 30uA DC current.

The MX25U1635E utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

FEATURES GENERAL

• Serial Peripheral Interface compatible 

-- Mode 0 and Mode 3

• 16,777,216 x 1 bit structureor 8,388,608 x 2 bits (two  I/O read mode) structure or 4,194,304 x 4 bits (four  I/O read mode) structure

• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually

•  Single Power Supply Operation

- 1.65 to 2.0 volt for read, erase, and program operations

•  Latch-up protected to 100mA from -1V to Vcc +1V

•  Low Vcc write inhibit is from 1.0V to 1.4VPERFORMANCE

•  High Performance

- Fast read for SPI mode

- 1 I/O: 104MHz with 8 dummy cycles 

- 2 I/O: 84MHz with 4 dummy cycles, equivalent to 168MHz

- 4 I/O: 104MHz with 6 dummy cycles, equivalent to 416MHz

- Fast read for QPI mode

- 4 I/O: 84MHz with 4 dummy cycles, equivalent to 336MHz

- 4 I/O: 104MHz with 6 dummy cycles, equivalent to 416MHz

- Fast program time: 1.2ms(typ.) and 3ms(max.)/page (256-byte per page)

- Byte program time: 10us (typical)

- 8/16/32/64 byte Wrap-Around Burst Read Mode

- Fast erase time: 45ms (typ.)/sector (4K-byte per sector); 250ms(typ.)

/block (32K-byte per block); 500ms(typ.)

 /block (64K-byte per block); 9s(typ.) 

/chip

•  Low Power Consumption

- Low active read current: 20mA(max.) at 104MHz, 15mA(max.) at 84MHz 

- Low active erase/programming current: 20mA (typ.)

- Standby current: 25uA (typ.)•  Deep Power Down: 2uA(typ.)

•  T   ypical 100,000 erase/program cycles

•  20 years data retentionSOFTWARE FEATURES

•  Input Data Format- 1-byte Command code

•  Advanced Security Features- Block lock protectionThe BP0-BP3  status  bit  defines  the  size  of  the  area  to  be  software  protection  against  program  and  erase instructions

-    Additional 4k-bit secured OTP for unique identifier

•  Auto Erase and Auto Program Algorithm- Automatically erases and verifies data at selected sector or block16M-BIT [x 1/x 2/x 4] 1.8V CMOS MXSMIO® (SERIAL MULTI I/O) FLASH MEMORY

- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first)• Status Register Feature

• Command Reset

• Program/Erase Suspend

• Electronic Identification- JEDEC 1-byte manufacturer ID and 2-byte device ID- RES command for 1-byte Device ID- REMS command for 1-byte manufacturer ID and 1-byte device ID

• Support Serial Flash Discoverable Parameters (SFDP) modeHARDWARE FEATURES

• SCLK Input- Serial clock input

•  SI/SIO0- Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode

•  SO/SIO1- Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode

•  WP#/SIO2- Hardware write protection or serial data Input/Output for 4 x I/O read mode•  NC/SIO3- NC pin or Serial input & Output for 4 x I/O read mode

•  PACKAGE

- 8-pin SOP (150mil) 

 - 8-pin SOP (200mil)  

- 8-land WSON (6x5mm)  

- 8-land USON (4x4mm)