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MXIC MX25L25645GM2I-08G NOR FLASH

MX25L25645G is 256Mb bits Serial NOR Flash memory, which is configured as 33,554,432 x 8 internally. When it  is in two or four I/O mode, the structure becomes 134,217,728 bits x 2 or 67,108,864 bits x 4.

  • Brand:

    MXIC
  • Product Details

GENERAL DESCRIPTION  

MX25L25645G is 256Mb bits Serial NOR Flash memory, which is configured as 33,554,432 x 8 internally. When it  is in two or four I/O mode, the structure becomes 134,217,728 bits x 2 or 67,108,864 bits x 4.  

MX25L25645G feature s a serial peripheral interface and software protocol allowing operation on a simple 3-wire  bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a  serial data output (SO). Serial access to the device is enabled by CS# input.  

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits  input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# and RESET# pin (of the 8-pin  packages) become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.  

The MX25L25645G MXSMIO®   (Serial Multi I/O) provides sequential read operation on the whole chip.  

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the  specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256  bytes) basis, or word basis. Erase command is executed on 4K-byte sector, 32K-byte block, or 64K-byte block, or  whole chip basis.  

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read  command can be issued to detect completion status of a program or erase operation via WIP bit.  

Advanced security features enhance the protection and security functions, please see security features section for  more details.  When the device is not in operation and CS# is high, it is put in standby mode.  

The MX25L25645G utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after  100,000 program and erase cycles.


FEATURES  GENERAL  

• Supports Serial Peripheral Interface -- Mode 0 and  Mode 3  

• Single Power Supply Operation   

- 2.7 to 3.6 volt for read, erase, and program operations  

• 268,435,456 x 1 bit structure  or 134,217,728 x 2 bits (two I/O mode) structure  or 67,108,864 x 4 bits (four I/O mode) structure  

• Protocol Support   

- Single I/O, Dual I/O and Quad I/O  

• Latch-up protected to 100mA from -1V to Vcc +1V  

• Low Vcc write inhibit is from 1.5V to 2.5V  

• Fast read for SPI mode  

- Support clock frequency up to 133MHz for all  protocols  

- Support Fast Read, 2READ, DREAD, 4READ,  QREAD instructions  

- Support DTR (Double Transfer Rate) Mode  

- Configurable dummy cycle number for fast read  operation  

• Quad Peripheral Interface (QPI) available  

• Equal Sectors with 4K byte each,  or Equal Blocks with 32K byte each  or Equal Blocks with 64K byte each  - Any Block can be erased individually  

• Programming :  - 256byte page buffer  

- Quad Input/Output page program(4PP) to enhance  program performance  

• Typical 100,000 erase/program cycles  

• 20 years data retention  SOFTWARE FEATURES  

• Input Data Format   

- 1-byte Command code  

• Advanced Security Features  

- Block lock protection  

The BP0-BP3 and T/B status bits define the size of  the area to be protected against program and erase  instructions  

- Individual sector protection function (Solid Protect)

• Additional 4K bit security OTP   

- Features unique identifier   

- Factory locked identifiable, and customer lockable  

• Command Reset  

• Program/Erase Suspend and Resume operation  

• Electronic Identification   

- JEDEC 1-byte manufacturer ID and 2-byte device ID  

- RES command for 1-byte Device ID  

- REMS command for 1-byte manufacturer ID and  1-byte device ID  

• Support Serial Flash Discoverable Parameters  (SFDP) mode  HARDWARE FEATURES  

• SCLK Input   

- Serial clock input  

• SI/SIO0   

- Serial Data Input or Serial Data Input/Output for  2 x I/O read mode and 4 x I/O read mode  • SO/SIO1   

- Serial Data Output or Serial Data Input/Output  for 2 x I/O read mode and 4 x I/O read mode  • WP#/SIO2   

- Hardware Write Protection or Serial Data Input/  Output for 4 x I/O read mode  

• RESET#/SIO3   

- Hardware Reset pin or Serial Data Input/Output  for 4 x I/O read mode  

• RESET#   

- Hardware Reset pin  

• NC/SIO3   

- NC or Serial Data Input/Output for 4 x I/O read  mode  

• PACKAGE  

- 16-pin SOP (300mil)  

- 8-pins SOP (200mil)  

- 8-land WSON (8x6mm, 6x5mm)  

- 24-ball BGA (4x6 ball array)  

- 24-Ball BGA (5x5 ball array)   

- All devices are RoHS Compliant and Halogen-free


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