GENERAL DESCRIPTION
Serial peripheral interface (SPI) NAND is an SLC NAND Flash memory device that provides a cost-effective nonvolatile memory storage solution where pin count must be kept to a minimum. It is also an alternative solution to SPI NOR, offering superior write performance and cost per bit over SPI NOR. The hardware interface creates a low pincount device with a standard pinout that remains the same from one density to another and supports future upgrades to higher densities without board redesign.
FEATURES
Single-level cell (SLC) technology
Organization
- Page size x1: 2176 bytes (2048 + 128 bytes)
- Block size: 64 pages (128K + 8K bytes)
- Device size: 2Gb (2 planes, 1024 blocks per plane)
Standard and extended SPI-compatible serial bus interface
- Instruction, address on 1 pin; data out on 1, 2, or 4 pins
- Instruction on 1 pin; address, data out on 2 or 4 pins
- Instruction, address on 1 pin; data in on 1 or 4 pins
User-selectable internal ECC supported
- 8 bits/sector
Array performance
- 104 MHz clock frequency (MAX)
- Page read: 25μs (MAX) with on-die ECC disabled; 70μs (MAX) with on-die ECC enabled
- Page program: 200μs (TYP) with on-die ECC disabled; 220μs (TYP) with on-die ECC enabled
- Block erase: 2ms (TYP)
Advanced features
- Read page cache mode
- Read unique ID
- Read parameter page
Device initialization
- Automatic device initialization after power-up
Security
- The 1 st block is valid when shipped from factory with ECC enabled
- Software write protection with lock register
- Hardware write protection to freeze BP bits
- Lock tight to freeze BP bits during one power cycle
Permanent block lock protection
- OTP Space: 10 pages one-time programmable NAND Flash memory area
Operating voltage range
- VCC = 2.7–3.6V
Operating temperature
- Commercial: 0°C to +70°C
Quality and reliability
- Endurance: 100,000 PROGRAM/ERASE cycles
- Data retention: JESD47H-compliant; see qualification report
- Additional: Uncycled data retention: 10 years 24/7 @ 70°C
IPv6 network supported