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/ESMT M13S2561616A-5TG DDR1 SDRAM 16*16

ESMT M13S2561616A-5TG DDR1 SDRAM 16*16

4M x 16 Bit x 4 Banks   

Double Data Rate SDRAM


  • Brand:

    ESMT
  • Product Details

Features  

 JEDEC Standard  

 Internal pipelined double-data-rate architecture, two data access per clock cycle  

 Bi-directional data strobe (DQS)  

 On-chip DLL  

 Differential clock inputs (CLK and CLK )  

 DLL aligns DQ and DQS transition with CLK transition  

Quad bank operation  

 CAS Latency : 2; 2.5; 3  

 Burst Type : Sequential and Interleave  

 Burst Length : 2, 4, 8  

 All inputs except data & DM are sampled at the rising edge of the system clock(CLK)  

 Data I/O transitions on both edges of data strobe (DQS)  

 DQS is edge-aligned with data for reads; center-aligned with data for WRITE  

Data mask (DM) for write masking only  

 VDD = 2.3V ~ 2.7V, VDDQ = 2.3V ~ 2.7V  

 VDD = 2.4V ~ 2.8V, VDDQ = 2.4V ~ 2.8V (for speed -4)  

 Auto & Self refresh  

7.8us refresh interval  

 SSTL-2 I/O interface 

66pin TSOPII and 60 Ball BGA package

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