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Main features of ML51PC0AE


ML51PC0AE is an enhanced 1T 8051 core microcontroller with built-in Flash. The typical power consumption in normal operation mode can reach 80 μA/MHz and the power consumption in sleep mode can be less than 1 μA. The highest speed of this series is up to 24 MHz, and a built-in 38.4 kHz low-speed internal oscillator supports a wide voltage operating range of 1.8 V to 5.5 V. Operating temperature:-40 ℃ to 105 ℃.

ML51PC0AE contains 32 K bytes of Flash and an additional 2 K bytes of on-chip auxiliary RAM (XRAM), equipped with a wealth of peripherals, such as 28 general-purpose I/O, 2 serial ports, 1 ISO-7816 interface, 2 groups I²C and 2 sets of SPI are available in LQFP32 package.

Target application:Wearable devices, smart remote controllers, Internet endpoint devices, smart homes, smoke detection devices, battery devices, etc.

Key features:


 -Fully static 8-bit 1T 8051 core CMOS microcontroller

 -The instruction set is fully compatible with MCS-51

 -4-level priority interrupt configuration

 -Dual data pointers (DPTRs)

• Working conditions

 -Wide voltage operating range 1.8V to 5.5V

 -Wide operating frequency up to 24 MHz

 -Industrial grade operating temperature-40 ℃ to + 105 ℃

• Low power consumption

 -Typical power consumption in normal operation mode 80 μA/ MHz

 -Typical power consumption of low power operation mode 15 μA

 -Low power consumption in idle mode does not exceed 13 μA

 -Typical power consumption in power-down mode is less than 1 μA

 -Wake-up time is 10 us in power-down mode (HIRC operation)


 -32 Kbytes APROM for user code

 -Configurable 4 K / 3 K / 2 K / 1 K byte LDROM, used to start the system programming (ISP) code

 -Application programming (IAP) memory in APROM is accumulated with 128 bytes per page

 -Flash memory 100,000 erase and write life

 -Code security encryption

 -256 bytes of on-chip RAM

 -Extra 2 Kbytes on-chip auxiliary RAM (XRAM), accessed via MOVX instruction



 -Three modes: external device to memory, memory to external device, and memory to memory transfer

 -The source and destination addresses must be word aligned in all modes

 -Memory to memory mode: transfer length must be word aligned

 -External device to memory and memory to external device modes: the length of the transferred data can be byte aligned

 -External device to memory and memory to external device mode: transfer data width byte alignment

• Clock source

 -24 MHz high-speed internal oscillator (HIRC) ± 1% accuracy class (25 ℃, 3.3V) Accuracy ± 5% accuracy class under full operating conditions

 -38.4 kHz low-speed internal oscillator (LIRC) ± 1% accuracy class (25 ℃, 3.3V) Accuracy ± 10% accuracy class over full operating conditions

 -External 4 ~ 24 MHz (HXT) crystal oscillator input for precise timing operation

 -External 32.768 kHz (LXT) crystal input

 -The clock source can be switched by software during operation

 -Programmable system clock divider from 1/2, 1/4, 1/6, 1/8…, up to 1/512

• Peripherals

 -28 general-purpose input and output pins. All output pins have independent 2-level level conversion rate control

 -8-channel GPIO interrupt, with edge/level detection, all 28 GPIOs can be configured as one of the input sources

 -Standard interrupt pins INT0 and INT1 are compatible with standard 8051

 -Two sets of 16-bit timer/counters 0 and 1 compatible with standard 8051

 -A set of 16-bit timer 2 with 3-channel input capture module

 -A set of 16-bit auto-reload timer 3

 -A set of programmable watchdog timer (WDT)

 -A dedicated set of self-wake timers (WKT)

 -Two full-duplex serial ports

 -A set of smart card interfaces support ISO7816-3

 -Two sets of SPI ports support master and slave modes, with a transmission rate of up to 6 Mbps when the system clock is 24 MHz

 -Two sets of I²C bus support master and slave mode, data transfer rate up to 400 kpbs

 -6 * 16-bit group, 12-channel pulse width modulator (PWM) output, up to 16-bit resolution

 -Two sets of comparators

 -A set of 12-bit ADCs with conversion rates up to 500 Ksps when VDD is greater than 2.5 V

• Power monitor

 -Undervoltage detection (BOD) can be used in low power consumption mode, 7 levels are selectable, configurable interrupt or reset

 -Power-on reset (POR)

 -Low voltage reset (LVR)

• Strong ESD and EFT capabilities

 -ESD HBM passes 8 kV

 -EFT> ± 4.4 kV

 -Latch test passed 150 mA

•Development tools

 -Nuvoton Nu-Link is based on KEILTM and IAR development environment

 -Nuvoton circuit programming (Nu-Link)

 -Nuvoton in-system programming (ISP) via UART

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